3.
Block Diagram
V CC
GND
WP
SCL
SDA
Start
Stop
Logic
Serial
Control
EN
H.V. Pump/Timing
LOAD
Logic
A 2
Device
Address
Comparator
COMP
LOAD
INC
Data Recovery
A 1
A 0
R/W
Data Word
Addr/counter
EEPROM
D IN
D OUT
Y DEC
Serial MUX
D OUT /ACK
Logic
4.
Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge
clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open drain driven and may be
wire-ORed with any number of other open drain or open collector devices.
Device/Page Addresses (A 2 , A 1 , A 0 ): The A 2 , A 1 , and A 0 pins are device address inputs that are hard wired for the
AT24C01C/02C. As many as eight 1-Kbit or 2-Kbit devices may be addressed on a single bus system. See Section 7.
“Device Addressing” on page 9 for more details.
Write Protect (WP): The AT24C01C/02C have a Write Protect pin that provides hardware data protection. The Write
Protect pin allows normal read/write operations when connected to ground (GND). When the Write Protect pin is
connected to V CC , the write protection feature is enabled and operates as shown below in Table 4-1 .
Table 4-1.
WP Pin
Status
At V CC
At GND
Write Protect
Part of the Array Protected
Atmel AT24C01C and AT24C02C
Full (2K) Array
Normal Read/Write Operations
Atmel AT24C01C/02C [DATASHEET]
8700F–SEEPR–6/12
3
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